Radio receiver

ABSTRACT

Various apparatuses and methods are described to reduce interference in signals subject to intermodulation products and high power narrow band interfering signals on lower power wideband signals. Apparatuses and methods described herein also provide the capability for supporting multi-standards, multi-modes and multi-bands in wireless and wired applications with a single receiver or a receiver with minor variations. The receiver described herein samples the entire band in which there can be signals of interest or signals that can generate interference. All of these signals are sampled in one bit stream and the bit stream is processed to isolate signals of interest and interfering signals. The isolated interfering signals are then cancelled out of the signals of interest.

This is a divisional of application Ser. No. 10/146,358, filed on May14, 2002, entitled “A RADIO RECEIVER,” and assigned to the corporateassignee of the present invention and incorporated herein by reference.

PRIORITY

The present patent application claims priority to the correspondingprovisional patent application Ser. No. 60/290,781, titled,“Harmonically Compensated Software Radio Receiver HCSRR” filed on May15, 2001, the corresponding provisional patent application Ser. No.60/309,602, titled, “Harmonically Compensated Software Radio ReceiverHCSRR with a Low IF” filed on Aug. 3, 2001, the correspondingprovisional patent application Ser. No. 60/311,942, titled,“Harmonically Compensated Software Radio Receiver HCSRR With a Low IF”filed on Aug. 13, 2001, and the corresponding provisional patentapplication Ser. No. 60/328,125, titled, “Harmonically CompensatedSoftware Radio Receiver HCSRR With a Low IF and Nonlinear DeltaModulated Transmitter” filed on Oct. 9, 2001.

FIELD OF THE INVENTION

The field of the invention relates to the field of radio receivers andnonlinear transmitters. More specifically, the invention relates toharmonically compensated radio receivers that demodulate multiplemodulations and bandwidth signals and provide interference compensation.

BACKGROUND OF THE INVENTION

FIG. 1 illustrates a block diagram of a prior art wirelesstransmitter/receiver. Referring to FIG. 1, duplexer 100, in cooperationwith an antennae, sends signals to a receiver 110 and will suffertransmitter feed thru in the duplexer from signals from a transmitter120. During reception, duplexer 100 sends a signal of interest (SOI)(which is included in the entire receive band of the receiver) through alow noise amplifier (LNA) 130 and a surface acoustic wave (SAW) filter140 to receiver 110. Receiver 110 uses a mixer 112 to mix a timingsignal from a local oscillator (LO) 150 with the signal-of-interest(including the entire signal band pass as passed thru SAW filter 140)and down converting it to an IF, before demodulating the signal with areceiver processor 114. The demodulated signal is sent to a basebandprocessor 160 for further processing. During transmission, basebandprocessor 160 sends a signal to be transmitted to the transmitter device120. Transmitter device 120 processes the signal with a transmitterprocessor 122, before using a mixer 124 to mix the signal with a signalfrom the local oscillator 150. The mixer 124 up converts the transmitsignal to the desired RF transmit frequency. A high power amplifier(HPA) amplifies the signal, before being sent by duplexer 100 to theantenna for transmission over the air.

One of the common problems associated with wireless communications isunwanted signals intermixed with the information signal. These unwantedsignals are referred to as interference. This interference can alter aradio frequency (RF) reception so that a receiver does not receive theinformation signal as intended.

To remove interference, filtering is often performed. The filtering maybe performed in the analog or digital domain. In one commonly usedtechnique, digital samples are low pass filtered to eliminate the higherharmonics above a baseband signal. However, this technique does noteliminate the interference due to the tails of the harmonic images thatextend into the baseband signal.

SUMMARY OF THE INVENTION

A method and apparatus for processing signals is described. In oneembodiment, the method comprises over-sampling, at a desired frequency,a passband of received signals to create a bitstream. The receivedsignals include signals of interest and interference generating signals.The interference generating signals capable of generatingintermodulation products inband of the signals of interest. The methodalso includes isolating signals of interest in the bit stream using oneor more decimating filters, isolating source signals that generate oneor more intermodulation products inband of the signal of interest usingone ore more decimating filters, computing an estimate of each of theone or more intermodulation products from the source signals thatgenerate the one or more intermodulation products, and canceling out oneor more inband intermodulation products using the estimate of theintermodulation products.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example and is notlimited in the figures of the accompanying drawings in which likereferences indicate similar elements and in which:

FIG. 1 illustrates a block diagram of a prior art wirelesstransmitter/receiver.

FIG. 2A illustrates a block diagram of an embodiment of a radio receiverthat includes an intermodulation compensator.

FIG. 2B illustrates a block diagram of an alternative embodiment of anintermodulation compensator.

FIG. 3 illustrates a block diagram of an alternate embodiment of thereceiver having a sample rate multiplier and an intermodulationcompensator.

FIG. 4 illustrates a block diagram of an alternate embodiment of thereceiver having a sample rate multiplier and an intermodulationcompensator.

FIG. 5 illustrates a block diagram of an alternate embodiment of thereceiver having an image reject filter to limit the sources ofinterference affecting the signal of interest.

FIG. 6 illustrates a flow chart of a process for compensating forintermodulation.

FIG. 7 illustrates a block diagram of one embodiment of a receiver inwhich multiple mobile telephony standards supported include CDMA2000,AMPS, TDMA, GSM and 3G WCDMA.

FIG. 8 illustrates a block diagram of one embodiment of a receivershowing the relationship with multiple vendors' baseband processors formulti-standard mobile telephony.

FIG. 9 illustrates a block diagram of one embodiment of a receiver thatsupports WLAN 802.11a and 802.11b and Bluetooth and provides mitigationof the interference of Bluetooth on 802.11b.

FIG. 10 illustrates a block diagram of one embodiment of a receivershowing the relationship with multiple baseband processors formulti-standard mobile telephony as well as the WLAN and PAN.

FIG. 11 illustrates the phase as adjusted by a desired increment.

FIG. 12 illustrates the the sampled images prior to band pass filtering.

FIG. 13 is a block diagram of one embodiment of a receiver havingQuad-Mode Dual Band IF Sampling with an IF Filter.

While the invention is subject to various modifications and alternativeforms, specific embodiments thereof have been shown by way of example inthe drawings and will herein be described in detail. The inventionshould be understood to not be limited to the particular formsdisclosed, but on the contrary, the intention is to cover allmodifications, equivalents, and alternatives falling within the spiritand scope of the invention.

DETAILED DESCRIPTION

This invention uses an over sampling technique known as a Sigma DeltaModulator, but uses it in a non-conventional way to achieve severalbenefits to be covered herein. (Note that in one embodiment a Flash A/Dconverter with sufficient resolution can be used, but will require alarge dynamic range to accommodate very large jamming signals in thereceive pass band and very high sampling speed to prevent aliasing). Thefull receive band, with the signal of interest (SOI) and all of theinterfering signals and sources of intermodulation products, isprocessed by over-sampling the entire band at very low quantization, 1or 2 bits. In one embodiment the transmitter feed thru is included inthe band pass of the signal to be sampled by the Sigma Delta Modulator.In other embodiments, only the receive band is included. In the SigmaDelta Modulator, the sampling is done at a rate high enough to precludealiasing of the signal (at a rate above the Nyquist rate). This providesa very low resolution digital sample of the passband. The 1 or 2 bitsamples are input to several decimating filters associated with theSigma Delta A/D converters simultaneously. These filters provide digitalfiltering for different signals of the receive band as well asperforming the down sampling function in which the high sample rate ofthe Sigma Delta A/D is traded for a higher signal to noise ratio andgreater quantization of a much more narrow band signal.

The high speed over sampling with the Sigma Delta Modulator followed bythe use of decimating filters two to produce two results. First, thefiltering is done at a high sampling rate (see FIGS. 12A and B forexample) and thus the images are farther apart and the power in thetails that is aliased in is much lower. Second, use of the Sigma Deltamodulators followed by decimating filters allows for using the SigmaDelta A/D converter to process multiple different signals in thepassband simultaneously. This keeps the signal synchronized and allowsfor the interference cancellations described in more detail below. Italso provides for selectively using different decimating filters toprocess different types and modes of signals in the same band, such as,for example, CDMA, TDMA, AMP, GSM, WCDMA, etc. In one embodiment, usinga single Sigma Delta or flash A/D converter to sample the entirepassband and then following this with selectable decimating filtersprovides the capability to process multiple signals within the passbandsimultaneously allowing a single receiver to receive multiple signalssimultaneously.

In FIG. 12, the sampled images prior to band pass filtering are shown.The sampling can be an exact harmonic of the final sampled carrierfrequency (prior to output to a baseband processor or it can be selectedto accommodate a near zero IF). If the sampling is not a even harmonic,the images will appear in different locations. In FIG. 12, the imagesare shown after band pass filtering. If the sampling rate fs is higher,the images are farther apart and the energy available to alias in to thedesired image is less. The high rate, but low resolution sampling, ofthe Sigma Delta Modulator places these images at multiples of the highsampling rate fs. When these signals are bandpass filtered, there islittle aliasing energy.

In the embodiment where in a flash A/D converter is used, the samplingrate required in the same as that of the Sigma Delta A/D only many bitsare required for each sample instead of only 1 or 2. This may not bepractical in cases where there are large interfering signals because theentire pass band is sampled and the sampling is done to a level ofdetail (number of bits) so that the signal of interest (SOI) can bedistinguished from the interfering signals in the time domain. In caseswhere there are not large interfering signals and a large dynamic rangeis not required, a flash A/D converter may be used in place of the SigmaDelta. In this case, the A/D converter is followed by conventionaldigital filters to isolate the SOI and the interfering and sourcesignals. Other attributes of this invention are the same for both ofthese embodiments (using a sigma delta and for using a flash A/D).

As is discussed below in one embodiment, a low resolution flash A/D maybe used in conjunction with the sigma delta, but the low resolutionflash A/D samples are only used for the energy search function and notthe signal processing function. In another embodiment, the lowresolution flash A/D converter samples are used to generate estimates ofthe intermodulation products that fall inband of the signal of interest.

The Harmonically Compensated Multi-Mode Radio Receiver uses a SigmaDelta over-sampling A/D converter in a non-traditional way. Note this isreferred to herein as a Sigma Delta Modulator. The use of a Sigma DeltaModular is independent of the target RF (radio frequency) because forall applications, the desired receive passband is down converted to thesame convenient intermediate frequency (IF). In different embodiments ofthis invention, some LO mixing frequencies and some of the filters aredifferent to accommodate different RF frequencies and bands of interest.In one embodiment, this invention, a low resolution (1 or 2 bits; 1 bitwill be used for discussion) Sigma Delta A/D converter in used to samplethe entire receive pass band (to include relevant interfering signalsand signals which can mix with other signals to produce intermodulationsignals in the signal of interest (SOI) band). In alternativeembodiments of this invention, the transmit feed thru band may also beincluded in the processed band to cancel interference in the receiveband from the transmitter feed thru in full duplex operation.) This lowresolution sampling is done at a sufficiently high enough rate topreclude aliasing (i.e. at a rate above the Nyquist rate for the entirereceive band and transmit band if required).

In applications where a device is designed to process, “to be selected”,bands within a receive band, the entire receive band is processed. Someexamples include mobile telephony, CDMA, TDMA. AMPS, GSM and wirelessLAN and PAN applications such at 802.11a and 802.11b and Bluetooth andothers.

The high rate, low resolution, sampled passband digital signal isduplicated and input to several digital filters (of the Sigma Delta A/DConverter) simultaneously. In a prior art application of a Sigma DeltaConverter, there is only one filter for the signal of interest (SOI). Inthe present invention, there are multiple filters that process the samehigh rate, low resolution samples. This provides for high resolutionsamples of narrow band selectable signals within the passband.Thereafter these narrow band signals are narrow band filtered and highresolution quantization is applied after the sigma delta decimatingfilters.

This selectivity of various signals with various bandwidths provides anumber of benefits. First, the signal of interest (SOI) can be isolatedfrom the interfering signals and the interfering signals and sources ofinterfering signals can be isolated from the SOL With this isolation,the interfering signals can be processed and digitally subtracted fromthe SOI. If the interfering signals are narrowband and high power withrespect to the SOI and inband, narrow filters can be placed around theinterfering signals and the interfering signals can then be subtractedfrom the SOI. As described in more detail below, this is one solutionfor mitigating the Bluetooth interference on 802.11b. If the interferingsignals are produced by the generation of intermodulation products thatfall in band of the SOI the source signals can be isolated and used togenerate a copy of the SOI inband interfering intermodulation productand then it can be cancelled out. This is one solution for mitigating3^(rd) order inter-mods in CDMA telephony and other applications.

Another key feature is that the digital filters used as the decimatingfilters in the Sigma Delta A/D converter can be programmed to isolateany signal in the passband. Since the passband may contain many signalsfor different standards and modes, the present invention can beimplemented to select any mode or band desired within the passbandthereby yielding a multi-mode multi-standard receiver with interferencemitigation. Frequency hopped signals are accommodated by usingprogrammable digital filters to pass the hopped signals in differentportions of the receive pass band. This provides for a single receiverto process many telephony signals to include CDMA, TDMA, AMPS, GSM and3G and others. The same receiver can process wireless LAN and 802.11aand 802.11b with Bluetooth. Note that all RF signals are down convertedto a common IF. This invention will be able to process any signals inthe passband. It will then support any standard baseband processor.Subject to the particular implementation, some or all of these and otherstandards may be supported.

While the description herein uses certain bandwidths and sampling rates,this invention may be used at any frequency and band pass required byimplementing it in different technologies such as CMOS, BiCMOS, SiGe,GaAs and others.

The architecture described can support any signaling scheme. Based onthe use of clocking speeds required, different technologies withdifferent frequencies responses may be used. It is envisioned that assemiconductor technologies advance, the present invention may be usedfor higher frequencies and wider band widths.

The present invention provides for multi-band, multi-mode,multi-standard receivers with interference mitigation fromintermodulation products and from high amplitude narrowband in-bandinterfering signals. This invention assumes that all signals in a givenRF band are received from the same antenna and are processed in the samereceive chain. No independent received chains or directional antennasare required, while these may provide some additional benefit.

The passband can be made wide enough to include the feed thru from thetransmitter in the duplexer, and the transmit feed thru can be treatedjust like any other jamming or intermodulation source signal. In oneembodiment, the receiver has a copy of the transmit signal after it hasgone thru the transmitter high power amplifier (HPA) and this signal canbe sent to the transmitter for calibrating at the non-linearpre-distortion in the transmitter. This pre-distortion pre-compensatesfor the amplitude to amplitude (AM/AM) and the amplitude to phase(AM/PM) non-linear distortion in the HPA. This is described in FIG. 3.

This invention is applicable to many communications systems to includewired and wireless. It can be used for satellite communications, fixedwireless, cable modems, DSL and many others.

The following are definitions of some of the terms used herein.

Signal of Interest (SOI)—with respect to the receiver, a signal that thereceiver is trying to receive and send, in digital form, to the basebandprocessor.

Jammer Signal—any signal in the receive pass band that is not theintended signal of interest (SOI).

Interfering Signal—any unwanted signal that falls inband of the signalof interest (SOI)

Intermodulation or Intermodulation product—the signal that results frommixing of jammer signals in the non-linearities of the system thatresult in generating interfering signals in the pass band of the signalof interest (SOI).

Source Signals—Signals that mix in the non-linearities to produceintermodulation products that fall inband of the signal of interest(SOI).

IIP2 and IIP3—Input intercept points for 2^(nd) and 3^(rd) orderproducts produced by mixing of jamming signals. The IIP2 and the IIP3are measurements that predict the magnitude of the interfering signals.

Sigma Delta Modulator—A circuit that generates a low resolution highrate digital sample of a wave form

Decimating Filter—A filter associated with the Sigma Delta Modulator orany digital down sampling filter. It provides narrow band filtering ofthe high speed, wide band, low resolution digital signal out of thesigma delta modulator and outputs a narrow band high resolution digitalsignal with many more bits of quantization. It may be a combination ofmultiple filters, but can be implemented as a FIR filter. It may be amulti-stage structure that filters and down samples in multiple steps.Decimating filters are used with conventional A/D converters, as well assigma delta converters.

The receiver is not a classical direct conversion receiver, but it doeshave the advantages of direct conversion without the disadvantages. Inone embodiment, there is only one LO and mixer and there is no IF SAWfilter. The receiver takes in analog RF and outputs digital I and Qsamples to the baseband processor for multiple standards. In otherembodiments requiring extremely high dynamic range, the IF SAW filtermay be included.

In the following description, numerous specific details are set forth,such as examples of specific signals, named components, connections,circuit layouts of intermodulation compensation components, etc., inorder to provide a thorough understanding of the present invention. Itwill be apparent, however, to one skilled in the art that the presentinvention may be practiced without these specific details. In otherinstances, well known components or methods have not been described indetail but rather in a block diagram in order to avoid unnecessarilyobscuring the present invention. The specific details set forth aremerely exemplary. The specific details may be varied from and still becontemplated to be within the spirit and scope of the present invention.

In general, various apparatuses and methods are described to reduceinterference in a signal of interest that is going to be subsequentlydigitally down-converted. In an embodiment, a radio receiver includes asampling rate multiplier coupled to one or more decimating filters(e.g., impulse response filters). In an embodiment in which a flash A/Dconverter is used instead of a sigma delta A/D converter, these filtersare conventional digital filters and may or may not be FIR filters. Thesampling rate multiplier samples a signal at an intermediate frequency(IF) that is to be demodulated at a sampling rate that is significantlygreater than the sampling rate of a subsequent digital down conversion.The over sampling ratio will be between 10 and 100 normally. The filtersassociated with the sigma delta converter are rather complex and theremay be a number of filters embodied in the decimating filters. Thefilters are decimating filters (e.g., FIR filters) that provide both thenarrowband filtering and the down sampling functions. Each impulseresponse filter filters digitally a signal of interest and down-samplesthe signal at the second sampling rate in order to reduce interferencein a signal of interest prior to the final digital down conversion. Thedecimating filters also increase the SNR in the narrow band signal bytrading the wideband high sample rate for a narrow band lower samplerate at a greater number of bits of quantization.

The radio receiver may also include intermodulation compensator tocompensate for interference from non-linearities present in the system.The radio receiver may also include the capability to cancel highamplitude narrow band interfering signals from wideband low amplitudesignals of interest.

FIG. 2A illustrates a block diagram of one embodiment of a radioreceiver. Referring to FIG. 2A, the receiver 200 includes sampling ratemultiplier 202, intermodulation compensator 204, a finite impulseresponse (FIR) filter 206 and a second FIR filter 208, a low noiseamplifier (LNA) 210, a duplexer 212, a surface acoustic wave (SAW)filter 214, and a clock generator 216. In one embodiment, clockgenerator function 216 is a dual function element in that it generatesthe mixing signal for a down conversion mixer and the sampling clock forsampling rate multiplier 202. In one embodiment, sampling ratemultiplier 202 may comprise a Sigma Delta A/D converter or other similardevice. A Sigma Delta A/D converter has a high bandwidth and samples ata rate greater than the final digital down conversion. The filtering andthe down-sampling are done in the decimating filters of the sigma deltaconverter. The decimating filters may be FIR filters or a combination ofdigital filters. In the sigma delta terminology, the function is calledthe decimating filters. In an embodiment, FIR filters 206 and 208comprise other filters such as decimating filters. In an embodiment,clock generator 216 is a local oscillator and generates the samplingclock for a sigma delta modulator. In one embodiment, a high bandwidthsignal consists of a input frequency bandwidth of 60 to 140 megaherz orgreater. The LO for down convertion to the IF is selected based on theRF band of interest (example around 1300 MHz for PSC band 1900 MHz downconverted to 600 MHz IF). In one embodiment, the clock signal for thesigma delta A/D converter is at least 2.5 times the bandwidth of thefitter 214. For a band width of 120 MHz, the sampling rate is around 350MHz. Two factors contribute greatly to determining the sigma deltasampling rate. First, the sampling rate is high enough to precludealiasing and second. the over sampling ratio (OSR) is high enough toyield adequate signal to noise ratio (SNR) after the decimating filters.The OSR is the ratio of the sigma delta 1 bit sampling rate to thenyquist sampling rate of the signal after the decimating filter. In oneembodiment, the OSR is at least between 8 and 16 for 2^(nd) or 3^(rd)order sigma delta loop. This yields a SNR of around 40 dB, which, inturn, yields 6 bits of resolution.

Note that in alternative embodiments the oversampling may be performedat baseband, RF, medium IF (e.g., at a frequency that is ½, ⅓, ¼ thedifference between RF and baseband), or low IF (e.g., at a frequencythat is less than five times the data bandwidth), as well as at IF.

In one embodiment, radio reciever 200 processes radio frequency (RF)signals received through antenna 218 with a convenient intermediatefrequency. Receiver 200 samples the intermediate frequency with the lowresolution (1 bit) sampling rate multiplier 202 and filters the digitalsamples with the one or more (decimating filters) FIR filters 206 and208 as part of a subsequent digital down-conversion.

Radio receiver 200 also uses intermodulation compensator 204 tocompensate for intermodulation products produced by the systemnon-linearities. Intermodulation compensator 204 estimates thenon-linearities and intermodulation products prior to final digitalconversion at baseband and output to the digital baseband processor(s)and uses these estimates to cancel out interference due to thenon-linearities in the signal of interest (SOI).

Radio receiver 200 has two parts: 1) sampling rate multiplier 202coupled one or more FIR filters 206 and 208 and 2) intermodulationcompensator 204. In the first part, radio receiver 200 significantlyreduces the interfering signals and noise in the signal receive band viathe RF SAW filter. Demodulation at an intermediate frequency (IF) via asub-sampling technique (subsampling downconversion and decimationfiltering) provides close-in rejection of unwanted signals. The IFanalog waveform is sampled at a high rate relative to the bandwidth ofthe SOI and then the SOI is filtered by the decimating filter which thenyields a narrowband signal with a high SNR and greater quantization from1 bit to 6 or 8 bits. The harmonics of the sampling function are spaceda multiples of the sampling rate and thus a high sampling rate placesthe harmonics far apart. When the decimating filter performs thefiltering on these harmonics, the tails from undesired harmonics andclose in interfering signals are eliminated or greatly reduced. Thissteep filtering is possible in the digital domain, but is not as easilydone in the analog domain. If the image filtering were performed afterthe down sampling as in a conventional A/D converter, the images wouldbe closer together and there would be a greater aliasing problem. Thesteep filtering of close in signals would most likely still beachievable given sufficient quantization.

In one embodiment, sampling rate multiplexer 202 comprises a Sigma Deltaanalog to digital (A/D) converter that takes digital samples of thewaveform at the IF. Each of FIR filters 206 and 208 filters the digitaldata samples from the Sigma Delta A/D converter prior to a subsequent(and first) digital down-conversion. In one embodiment, down-samplingthe Sigma Delta samples occurs at, typically at least 4 to 8 times thesymbol rate of this subsequent digital down-conversion. Since each ofFIR filters 206 and 208 may be a fractionally spaced FIR, the band-shapearound the desired signal can be controlled very accurately. In oneembodiment, Sigma Delta A/D converter 202 samples at a rate 5 to 10 ormore times the rate of the final digital down sampling rate and with anOSR of 10 to 20 or more. Thus, the sampling images are 5 to 10 times ormore times farther apart in the frequency domain. Since each of FIRfilters 206 and 208 filters at the Sigma Delta rate, the aliasing tailsare significantly reduced when aliased into the baseband as a result ofthe final digital down-sampling. FIR filters 206 and 208 provide an“effective” sharp filter on the radio-frequency signal, and eachharmonic, that assists in reducing close-in jamming signals. Aliasingtails from the harmonics appear as unwanted high-frequency signals andif not for FIR filters 206 and 208 could appear as undesired componentsin the digital signal after conversion into a digital value. In anembodiment, each FIR filter has programmable tap weights. The tapweights can be selected to compensate for either alpha band limiting orjammer rejection as described in more detail below. Alpha is theexpansion over the Nyquist bandwidth .i.e. 0.1 to 0.25 typically; thisband limits the signal by introducing controlled inter-symbolinterference.

Intermodulation compensator 204 provides compensation forintermodulation products produced by the non-linearities in the system,such as those produced by the non-linearities reflected in the inputintercept points 2 and 3 (IIP2 and IIP3) measurements. The IIP2 and IIP3are measurements that predict the magnitude of intermodulation productsas a function of the input power level and non-linearities of thesystem.

In one embodiment, intermodulation compensator 204 receives two or morebit streams from Sigma Delta A/D converter 202 (based on theimplementation and how many interfering signals are to be compensated),because Sigma Delta A/D converter 202 outputs two or more copies of thedigital samples at a sampling rate greater than the sampling rate of thefmal digital down conversion. One output from Sigma Delta A/C converter202 is sent to FIR filter 206, while the other copy is sent to FIRfilter 208. FIR filter 206 operates as a band pass filter and filtersone bit stream from Sigma Delta A/C converter 202 for the signal ofinterest, (such as the desired digital information signal at the IF),thereby producing the signal-of-interest that includes the in-bandinterference signal, but not the source signals if the interferencesignal was a product of intermodulation mixing.

In one embodiment, FIR filter 208 operates as a band reject digitalfilter at the passband of interest for the signal of interest andproduces a copy of the out-of-band signals that are the source of thein-band interference intermodulation products. The out-of-band signalsare used to compute estimates of the in-band intermodulation products,which are then used to cancel the interference. A processor 220 computesthe expected in-band interfering signals based on the IIP2, IIP3, andother attributes of the system such as phase and amplitude offsets.

FIR filter 222 is a band pass filter that passes the intermodulationproducts that fall in band of the SOI. The estimate of the interferingsignal is inverted to produce a cancellation signal 224. An adder 226adds the inverted cancellation signal 224 into the original desiredsignal from FIR filter 206 to cancel interference signals within theoriginal Signal of Interest (SOI).

The output of adder 226 is input to correlator 228. In one embodiment,correlator 228 cross correlates the inverted estimate of the interferingsignals with the SOI after the addition of the estimate of theintermodulation interference and uses a zero forcing (or other adaptivealgorithm that reduces, and potentially minimizes, the interference suchas, for example, a dither algorithm) algorithm 230 to force the crosscorrelation to approach a minimum (e.g., until the cross correlation isat a minimum). More specifically, correlator 228 adjusts the phase andamplitude of the estimated interference signals with a zero forcing (orother adaptive) algorithm 230 to create control signals that are fedinto and control the invert cancellation signal 224. This control loopmay run continuously to adaptively cancel the in-band interferingsignals.

The output of adder 226 is also fed into low pass filter 232. Low passfilter 232 performs data band pass filtering to remove any remainingharmonics above the baseband signal. The output of low pass filter 232is filtered by high pass filter 240 to eliminate any DC offset and tocreate filtered digital baseband signal 250.

FIG. 2B illustrates a block diagram of a more detailed alternateembodiment of an intermodulation compensator. Referring to FIG. 2B,intermodulation compensator 204 operates similarly to the operation ofthe receiver in FIG. 2A described above. Intermodulation compensator 204comprises a FIR filter and down sample cell that generates signals 206,208A and 208B. In one embodiment, signal 206 is a 20 Mega sample persecond, 6 bit signal of interest. Signals 208A and 208B represent theout of band signals are processed by processors 220A and 220B and theyare also at 20 mega samples per second and 6 bits. Processor 220A andprocessor 220B are used to compute the estimate of the in bandinterference signals which will be used to cancel the interferencesignal inband of the SOI. Processor 220A and its associated components224A and 228A phase adjust, amplitude adjust, and perform signalinversion on the computed transmitter feed through intermodulationproducts. Processor 220B and its associated components 224B and 228Bphase adjust, amplitude adjust, and perform signal inversion on thecomputed intermodulation product from the source signals. The phase andamplitude adjusted inverted signals from processors 220A and 220B areadded to signal 206 via adder 226. The resulting signal is output tocorrelators 228A and 228B as well as I-Q de-interleaver and basebandprocessor interface cell.

Note that the clocking and sampling rates specified herein are for oneembodiment. In alternative embodiments, different clocking and samplingrates, may be for different applications and signals of interest.

FIG. 3 illustrates a block diagram of an alternate embodiment of thereceiver and a high level embodiment of the companion non-lineartransmitter. Different embodiments may have the receiver and/or thetransmitter.

Referring to FIG. 3, the receiver 300 includes a duplexer 301, anantenna 303, an RF front end cell 305, a down converter cell 310, aSigma Delta cell 315, a flash A/D cell 320, a FIR filter and down samplecell 325 (also known a decimating filters), a search cell 330, a controland status/house-keeping cell 335, an intermodulation cancellation cell340, a baseband processor interface 345. In the receiver, the SigmaDelta cell 315 and flash A/D cell 320 are sampling rate multipliers, butare used to two very different purposes. In the transmitter, thereexists a non-linear pre-distortion compensation module 350, anup-sampling and delta modulator module 355, and a high power amplifier360.

Antenna 303 is connected to duplexer 301. While in receiver mode,duplexer 301 feeds incoming signals into a RF front end (RFFE) cell 305.A RFFE, module 306 in the cell receives the signal, amplifies the signalwith a LNA, and filters the signal with a SAW filter. The amplified andfiltered signal is passed to the IF down converter (D/C) cell 310. D/Ccell 310 uses a down converter module 311 to down convert the signal.D/C cell 310 passes copies of the down converted analog signal to SigmaDelta cell 315 and flash A/D cell 320. Sigma Delta cell 325 uses a SigmaDelta A/D converter module 316 to produce multiple copies of samples ofthe signal to be sent to FIR filter and down sample cell 325 (decimatingfilters).

In one embodiment, FIR filter and down sample cell 325 contains threemodules: a signal-of-interest FIR module (decimating filter) 326 tofilter and down sample the signal-of-interest, a transmitter feed thruFIR module (decimating filters) 327 to filter and down sample thetransmitter feed thru and the “half way signal”, which is a signal halfway between the transmit and receive band, and a source signal FIRmodule (decimating filters) 328 to filter and down sample other sourcesignals. These signals are the signals in the receive band that createthe intermodulation products that produce an interfering signal(s) inthe SOI pass band. The transmitter feed thru path 327 can be used tocancel a close in jammer (close to the receive SOI) that can bemodulated by the transmit signal feed thru. In one embodiment, thetransmitter feed thru appears as a modulation on a high amplitudeclose-in blocking signal. The techniques described herein are intendedto include the mitigation of this interference by the computation of theresultant interference in the band of the signal of interest. Theblocking signal is isolated and it is used, along with the transmitterfeed thru, to compute the estimate of the interference signal forcancellation of the inband interference.

The flash A/D cell 320 uses a flash A/D module to sample the receiveband to a medium resolution (approximately 4 bits) at a high enough rateto avoid aliasing. This digital sample is sent to the source signalsearch cell 330. Source signal search cell 330 uses a search module 331to search for intermodulation source signals. This may be done by amulti step process in which the discrete Fourier transform (or a FastFourier Transform) is computed for a spectral resolution of 3 MHz tolook for significant energy (high energy relative to other components)components in 3 MHz bands. For those bands with significant energy, asecond set of discrete Fourier transforms (or a Fast Fourier Transforms)are computed for bands with 300 kHz pass bands. This process iscontinued until the band pass of the source signals have been isolated.This can be done to any frequency resolution desired. In one embodiment,the search is only carried to the second level. The source signal searchfunction does not isolate and band pass the source signals, but simplyidentifies the bands where they are located. The decimating filtersisolate the source signals.

In one embodiment, the low resolution 4 bit samples from the Flash A/Dconverter are narrow band filtered, around the source signals, to yielda 6 to 8 bit sample and these samples are used to generate the estimateof the intermodulation products for the cancellation process.

The identified frequencies of the intermodulation source signals aresent to source signal module 328. In one embodiment, a control andstatus/house-keeping cell 335 controls search module 331, thesignal-of-interest FIR module 326, and the transmitter feed FIR module327. In one embodiment, the control and status function providesinformation to the others cells as to the location of known signals suchas the transmitter, so the search algorithm does not confuse it foranother signal.

All three of the filtered signals sets are passed from FIR filter anddown sample cell (decimating filters associated with the sigma deltaA/D) 325 to intermodulation cancellation cell 340. In intermodulationcancellation cell 340, a transmitter feed thru intermodulation productsgeneration module 341 uses the filtered transmitter feed thru andassociated interference source signal half way between the transmitterand the receiver signal to compute the intermodulation interferenceproduced by the transmitter feed thru and other mixing signal(s). ASource Signal Intermod (SIM) generation (SIM GEN) module 342 uses thefiltered source signals from decimating filters 328 to compute theestimate of the intermodulation interfering signals. A cancellationsumming cell 343 inverts and combines both of these signals with thefiltered signal-of-interest to produce a signal-of-interest with theintermodulation interference canceled. The resulting signal-of-interestis sent to a baseband processor interface 345. In one embodiment,cancellation summing cell 340 includes a control loop that adjusts thephase and amplitude of the canceling signals to reduce, and potentiallyminimize, interference, as described in more detail below.

In one embodiment, transmitter feed thru module 327 receives a signalfrom search cell 330 that identifies the location of a close-in blockingsignal and then transmitter feed thru module 327 isolates the blockingsignal and uses it along with the transmitter feed thru to generate anestimate of the interference generated by the transmitter feed thruamplitude modulating the blocking signal.

Baseband processor interface 345 uses a digital word de-interleavingmodule 346 to separate the signal into in-phase and quadrature signalsto be sent by baseband processor. In on embodiment, the basebandprocessor may perform a final digital down conversion. This may be doneby taking four time samples and using the first two as I and Q anddropping the next two. In one embodiment, the first and the thirdsamples are averaged to get the I value and the second and the fourthare averaged to get the Q sample. In some cases, this improves the SNRby 3 dB. If the sample rate is not high enough after this is performed,then the intermediate values are achieved by interpolation. This processguarantees the I and Q signals are in perfect quadrature. If the I and Qsignals are required to be coherent, a phase lock loop can be used todetermine the time offset and the samples can be shifted achievecoherence.

In one embodiment, the receiver may digitally down-convert the signal ofinterest independent of the type of modulation associated with thesignal because the interference is being removed from the signal withoutforeknowledge of the type of modulation associated with the signal ofinterest. The type of modulation could be, for example, amplitudemodulation, frequency modulation, or pulse modulation, amplitude phasemodulation, phase keyed modulation, TDMA, FDMA, CDMA or any other typeof modulation. The present invention does not require a uniquemodulation for either the signal of interest (SOI) or the interferingand cancellation signals.

In one embodiment, the non-linear transmitter processor chain uses asimilar architecture to transmit signals, a sigma delta D/A converter.In another embodiment, a conventional D/A converter with a conventionalup conversion scheme may be used in conjunction with the non-linearpre-distortion. The I and Q digitally sampled signals are sent to anon-linear pre-distortion compensation module 350, which providespre-distortion and combines the I and Q signals. In one embodiment,samples from the transmitter feed thru from the receiver are used toupdate the pre-distortion compensation. The update to the non-linearpre-distortion may be performed by comparing a copy of the transmitterfeed thru signal (which is a copy of the transmitter signal after thehigh power amplifier (HPA) non-linearity) to a non-pre-distorted copy,or the original signal. If the non-linear pre-distortion in thetransmitter has been done perfectly, the difference in these two signalsis zero. Any variation indicates a need to update the non-linearpre-distortion corrections for the AM/AM and the AM/PM. In oneembodiment, the copy of the transmitted signal is received from thereceiver, and in another embodiment, the transmitter has a signal pathused to down convert and demodulate a copy of the signal after it hasgone thru the HPA. In either way, the non-distorted transmit signal iscompared to the transmitted signal to update the pre-distortionfunction. This provides a continual update to the pre-distortionfunction over time and temperature which can be critical in deviceswithout temperature compensation such as, for example, mobile devices.The combined signal is sent to up-sampling and delta modulator module355 for up-sampling and delta modulation. Thereafter, the signal is upconverted and amplified by transmit RF conversion and high poweramplifier (HPA) 360. The amplified signal from HPA 360 is sent toduplexer 301 to be transmitted from antenna 303.

The baseband processor may be implemented as one or more integratedcircuit (IC) chips. The receiver supports a very large number ofdifferent vendors' baseband chips. The only changes that might be usefulwould be minor changes for each unique control and status interface fordifferent vendors. In alternative embodiments some or all portions ofthe transmitter and receiver may be incorporated on the same integratedcircuit as the baseband processor.

FIG. 4 illustrates a block diagram of another alternate embodiment of awireless communication receiver and transmitter. As above, thetransmitter and receiver may be implemented as multiple ICs or as asingle IC. Referring to FIG. 4, receiver 400 comprises an RF front endincludes similar components as above including LNA 404, a RF SAW filter406, local oscillator 400 and down-conversion mixer 402. In oneembodiment, the receiver chip may or may not include the down conversionlocal oscillator 400 and mixer 402. In another embodiment, the LNA maybe on or off chip.

Antenna 403 is coupled to a duplexer 401. Receiver 400 receives itsinput from an output of duplexer 401 and outputs 6 bit in-phase (I) andquadrature (Q) data streams to baseband processor 160. In otherembodiments, the number of bits output to the baseband processor may beincreased or decreased as required. In one embodiment, SAW filter 406has a bandwidth of 140 MHz connected to LNA 404. In alternativeembodiments, the function performed by the SAW filter may be more narrowor wider depending on the signal space of interest and the sources ofinterfering signals. The 140 MHz SAW filter 406 passes the signal ofinterest, i.e. the desired signal, as well as all of the signals thatproduce intermodulation products. In one embodiment, duplexer 401provides reasonable attenuation beyond the receive band of 1930 to 1990MHz. The RF front end accommodates the entire bandwidth of the receiveband because any designated frequency between 1930 and 1990 MHz may beassigned on a quasi-random basis. The out-of-band signals such as thetransmit bands from 1850 to 1910 MHz are attenuated by approximately 50dB. In alternative embodiments, the RF frequency band may be different,such as for telephony bands in other parts of the world, Cellular bandsin the U.S. (800 MHz), wireless LAN in the ISM band and 5 GHz band.Satellite applications will have other RF bands for which this inventionwill be applicable. Fixed wireless could be any frequency from 1 to 60GHz and wired applications, such as, for example, cable modems, DSL andothers, can have a wide range of frequencies. The present is applicableto wired as well as wireless applications.

In one embodiment, the transmitter signal can be as high as +30 dBm withthe receiver as low as −119 dBm. Duplexer 401 attenuates the transmitsignal by approximately 50 dB, leaving the transmitter feed through at−20 dBm. Duplexer 401 feed thru of the transmitter signal could be oneof the largest jammer source signals in the receive path and result inintermodulation products by mixing with other extraneous signals andgenerating inter-modulation products in LNA 404, down converting mixer402 and associated amplifiers in the receive chain. A jammer sourcesignal is a signal present in receiver 400 that has the potential toproduce mixing intermodulation products, which can interfere with thesignal-of-interest.

After the down conversion to IF, receiver 400 passes the 140 MHz (whichmay be a different bandwidth in other embodiments) to capture thesignal-of-interest and the potential source signals for intermodulationgeneration.

FIG. 5 illustrates a block diagram of an alternate embodiment of thereceiver having an image reject filter to limit the sources ofinterference affecting the signal of interest. Receiver 500 contains animage reject filter 504 to perform image rejection on the signal ofinterest before applying Sigma Delta A/D converter 506. Image rejectfilter 504 will filter out all undesirable mixing products from the downconversion mixing process. The passband of the front of the systemincluding SAW filter 508 and the band pass of image reject filter 504 ismatched to the range of bandwidths that may contain the signal ofinterest and interference source signals. In one embodiment, imagereject filter 504 is an off-chip filter. In another embodiment, imagereject filter 504 is an on-chip filter. Image reject filter 504 may beeither part of the sampling, filtering and processing (SFP) unit 408 ora down conversion unit. In an embodiment, due to the fast sampling rateof the sampling process, image reject filter 504 has only a few poleswith a pass band of 140 MHz to avoid aliasing with a nominal 350 megasample per second sampler. In one embodiment, image reject filter 504 isa reasonably benign filter and, in combination with the out of bandrejection features of the subsequent decimating filter, providesadequate filtering, thus eliminating the need for an intermediatefrequency SAW filter (which is not shown in this figure).

Referring back to FIG. 4, after the sampling has been accomplished, thesampled 140 MHz wide signal is sent to the bank of digital band passfilters, namely BPFs 410, 412, 414, which are decimating filters. Theanalog signal is tapped off prior to the sampling function and sent toan analog filter 422 which supports the flash A/D and the searchfunction discussed herein. This bank of band pass filters includes a BPFfor the signal-of-interest (BPF 410), a BPF for the transmitter feedthrough and associated signals (BPF 412), and a BPF for source jammersignals (BPF 414). These are the sigma delta related decimating filters.Source jammer signals produce in band inter-modulation products. In oneembodiment, all of these signals are down sampled and processed at 6bits and 20 mega samples per second. The exact sampling rate may vary indifferent embodiments of the invention depending on the requirements ofresolution and bandwidth.

In one embodiment, BPF 410 is a programmable digital filter used to bandpass the signal-of-interest and subsequently down sample to yield a highsignal noise, narrow band, high bit resolution digital signal. Inalternative embodiments, BPF filter 410 for the SOI is fixed and the LOis adjustable to place the signal of interest in the same place when thedown conversion is performed. In one embodiment, this filter is a FIRfilter with 90 to 128 taps. In another embodiment, the filter is acomplex set of filters with intermediate down-sampling. In oneembodiment, the FIR filter has programmable tap weights and the tapweights are selected for jammer rejection to reject jammer signals closeto the signal-of-interest. In one embodiment, the jammer signals are asclose as 900 kHz and 1700 kHz off center band of a 1.23 MHz wide signal.In alternative embodiments, the jammer source signals can be any wherein the receive band. In one embodiment, the jammer signals are as highas −30 dBm with the signal-of-interest at −116 dBm. The output of BPF410 is sent to cancellation unit 428 (e.g., signal adder, summationunit, etc.) where the interference intermodulation product signals arecancelled.

In one embodiment, the intermodulation compensator 403 may operate asfollows. BPF 412 band pass filters the transmit signal and any signalthat falls “half way” between the transmitter and the receive signal.These half way signals, when mixed with the transmit feed throughsignal, can drop an intermodulation product in band of thesignal-of-interest. Since the location of these signals is known, nosearch algorithm is required. In one embodiment, BPF 412 is aprogrammable FIR filters programmed to filter the transmitter signal andthe other mixing signals. In alternative embodiments, BPF 412 may be afixed set of filters. The output signals from BPF 412 are sent to aprocessing block 416 that generates an estimate of the intermodulationproduct(s). In one embodiment, these signals are 6 bits and 20 megasamples per second. The output of BPF 412 and the output of 410 are atthe same quantization (number of bits) and clock rate. The sourcesignals, and thus the estimate of the intermodulation products, aregenerated from the same bit stream as the SOI and this makes keeping thesignals coherent much easier, which, in turn, makes generating accurateand timely interference cancellation signals possible. It is also easierto cancel the interference signals if all the signals have seen similartransfer functions.

Analog bandpass filter 422 is an anti-aliasing filter prior to the flashA/D converter 424. In one embodiment, flash A/D converter 424 is a lowto medium resolution A/D converter (around 4 bits) that samples theentire band in which source signals can exist and which have thepotential to produce intermodulation products inband of the SOI. Asearch unit 418 detects the presence of the energy of source jammingsignals that have the potential to generate in-band intermodulationproducts. When signals of sufficient energy are detected with thecorrect relationship to generate in band intermodulation products, thefrequencies are passed to BPF 414, which filters the signals of interestand passes them to processing unit 420 where an estimate of theintermodulation product(s) is generated. These signals are 6 bits and 20mega samples per second.

In one embodiment, filters 412 and 414 are only a few poles and fairlybenign in that the out of band roll off characteristics can provideshallow shirts. Steep filters are not desired here, as the sourcesignals passed are used to generate the estimate of the intermodulationproducts in the time domain. Further, the actual signal should befiltered as little as possible, such that the time domain representationof the signal is as accurate as possible without passing unwantedsignals and noise. The side lobes are desired for signal accuracy in thetime domain. A copy of the transmitter feed thru signal is also sent toparameters 444 on the transmitter portion to update a non-linearpre-distortion algorithm.

The interference compensation functions associated with filter 414,filter 420, intermodulation product signal generator (phase andamplitude adjuster) 432, cancellation unit 428, 434, filter 422, flashA/D converter 424 and jamming signal search unit 418 can be readilyexpanded to filter and process, for cancellation of intermodulationproducts, as many signals as desired. In one embodiment, thisapplication is restricted to the IS-95 number of jammers to save power.

Bandpass filter 422 and flash A/D converter 424 provide the digitalsamples required by the jamming signal search unit 418. At the output ofthe IF amplifier, the analog signal is sent to the anti-aliasing bandpass filter 422 and flash A/D converter 424. In one embodiment, theanalog signal is a 140 MHz signal that is filtered with a bandpassfilter 422 with a band pass of 60 or 120 MHz corresponding to thereceive band of the Code Division Multiple Access (CDMA) signals. Inalternative embodiments, the band pass of anti-aliasing band pass filter422 is determined by the requirements of the specific application, wiredor wireless. After the filtering, the signal is sampled with flash A/Dconverter 424 at 200 to 350 MS/s at 4 bit resolution. The sample rate isdetermined by the bandwidth of the anti-aliasing filter and the numberof bits may vary in various embodiments. Search unit 418 uses thedigital samples to fmd the location of signals with energy beyond aselected threshold which could generate SOI inband intermodulationproducts. The threshold may be determined by the particular application.For each application, there are levels below which the source signals donot generate intermodulation products large enough to be of a concern.When source signals are present, which can produce intermodulationproducts, inband of the SOI, the strongest interferers are processed.Search unit 418 passes the frequencies to BPF 414 for filtering the highfidelity 6 bit copies of the source signals at 20 MS/s. Actual rates andquantization levels are dependent on the particular application andembodiment.

In one embodiment, if there is the potential for more than oneintermodulation product to fall inband of the SOI and in this case, theprocesses may select the largest. Search unit 418 is designed to findthe signal energies and pass the frequencies to BPF 414 within 10 msecor less. In some embodiments, the timing requirements may be differentand is an implementation issue that may be resolved by parallelprocessing if required. CDMA specification allows for a frame error rateof 0.01 frames when the jammer signals are present. Each frame is 20msec. This frame hit is only taken once. In one embodiment, search unit418 searches for as many jammer signals as desired. In theory, anynumber of jammers can be managed depending on the complexity of theimplementation.

In one embodiment, when the transmitter and the “half way” signal arereceived by the transmitter feed-through intermodulation productsgenerator 416, the samples are multiplied in the time domain to generatethe estimate of the intermodulation product. When a source signal is nolonger present, the estimate of the intermodulation goes to zero becauseone of the signals is either multiplied by zero or a very small signal.The estimate of the intermodulation product is sent to theintermodulation cancellation signal generator 426 where the signal isadjusted for phase and amplitude by phase/amplitude adjusterfunctionality therein and inverted by inverter functionality to cancelthe inter-mod in the band of the SOI.

The amplitude of the intermodulation product is estimated by theknowledge of the estimated IIP3 and sometimes the IIP2. The estimates ofthe IIP2 and IIP3 are updated as the corrections are made to the phaseand amplitude of the estimated intermodulation product to reduce, andpotentially minimize, the interference. The estimate of theintermodulation product is sent to cancellation unit 428 forcancellation of the intermodulation product(s) as well as to thecorrelation and correction unit 430 where the corrections to the phaseand amplitude of the estimate are computed via an adaptive algorithm,such as a zero forcing algorithm. In one embodiment, the algorithm is adither algorithm which uses two correlators, one is used to correct thephase and one is used to correct the amplitude. Other algorithms can beused and may be based on least squares of estimates and errors and likealgorithms.

The transmitter feed thru can appear as an amplitude modulation on ahigh power close in jammer as is possible in an embodiment of theinvention for CDMA IS-95/98 and CDMA 2000. In this case, the transmitterfeed thru filtered in filter 412 and a second signal from the close injammer may be used to generate a canceling signal for this interference.

In one embodiment, with respect to the correlation and correctionfunction 430 and 434, a copy of the estimate of the intermodulationproduct is received from intermodulation cancellation signal generator426 or from intermodulation cancellation signal generator 432. Thisfunction also receives a copy of the SOI after cancellation of theintermodulation products in cancellation unit 428. The signal receivedfrom intermodulation cancellation signal generator 426 orintermodulation cancellation signal generator 432 (depending on whichintermodulation product is being talking about), is fed to two internalcorrelators. In the first correlator, the signal from intermodulationcancellation unit 426 for intermodulation cancellation signal generator432 is phase shifted by 90 degrees and the cross correlation betweenthis signal and the output of cancellation unit 428 is computed. Thesecond correlator correlates the signal from intermodulationcancellation signal generator 426 or intermodulation cancellation signalgenerator 432 with the output of cancellation unit 428. By using adither algorithm to reduce, and potentially minimize these correlationsand alternately adjusting the phase and amplitude of the estimate of theintermodulation product, the interference is reduced (and potentiallyminimized). This technique provides for control on the adjustment of thephase and amplitude of the intermodulation product estimate to reduce(and potentially minimize) the interference.

In intermodulation cancellation signal generator 426 and intermodulationcancellation signal generator 432, the phase and amplitude of theestimate of the intermodulation product is adjusted with sufficientgranularity so as to closely match the phase and amplitude of theintermodulation product generated in the non-linearities. When thenumber of samples is low relative to the carrier frequency, a simpledelay of digital samples does not provide sufficient resolution of thephase adjustment. As an example, when the sample rate is 20 mega samplesper second, and the IF is around 5 MHz (as can happen with the downsampling), each sample is only about 90 degrees. FIG. 11 shows how, inone embodiment, the phase is adjusted by any desired increment, evenwhen the sample rate is low. In this embodiment, the original samples A,B, and C, are converted to samples a, b, c by weighted interpolation.The new samples a, b, and c are mapped into the time slots of A, B, C.In one embodiment, the phase shifting function is performed using a FIRfilter with only a few taps. By properly selecting the weighting ofvalues A, B, and C in the interpolation process, any arbitrary phaseshift can be achieved. The amplitude may be adjusting by simple scaling.

When the intermodulation products generator 420 receives the jammer(source) signals, the samples are multiplied in the time domain togenerate an estimate of the intermodulation product. When a sourcesignal is no longer present, the estimate of the intermodulation goes tozero because either one of the signals is multiplied by zero or a verysmall signal. The intermodulation estimate is sent to theintermodulation cancellation unit 432.

The amplitude of the intermodulation product is estimated by theknowledge of the estimated IIP3 and sometimes the IIP2. These estimateIIP2 and IIP3 are updated as the corrections are made to the phase andamplitude of the estimated intermodulation to reduce, and potentiallyminimize, the interference. The estimate of the intermodulation is sentto the canceling unit 428 for cancellation of the intermodulationproduct(s) as well as to the correlation and correction unit 434 wherethe corrections to the phase and amplitude of the estimate are computedvia an algorithm, such as a zero forcing algorithm or dither algorithmor other as described above. The generation of jammer signalintermodulation products and cancellation signals is expanded to computeas many signals as desired. In an embodiment, restricting thisapplication to the IS-95 number of jammer signals saves power. Prior tothe cancellation process, the estimates of the intermodulation productsare filtered to only pass those which fall inband of the signal ofinterest.

In one embodiment, the estimates of the intermodulation products fromthe jammer signals and the transmitter feed through relatedintermodulation products are inverted and added at 6 bits and 20 megasamples per second to the signal-of-interest. The output of cancellationunit 428 is sent to the de-interleaver 436 and the correlation units 430and 434. With the output of the cancellation unit and the copy of theestimate of the intermodulation products, correlation units compute thecross correlation between the estimate of the intermodulation productsand the signal-of-interest after the cancellation process. In oneembodiment, the correlation unit sends control signals, such as phaseand amplitude corrections based on a zero forcing algorithm (or somesimilar function to reduce or minimize the interference) to the phaseand amplitude adjustment and signal inversion units 426 and 432. In oneembodiment, this is done for the minimal set of signals (2 signals) asspecified by IS95 but can be expanded to any number of signals based onthe application.

The estimate of the intermodulation products is inverted and added usingadder 428 to the signal-of-interest to cancel the intermodulationproducts. The parameters of the intermodulation generation processchange as a function of time and temperature. This architecturemaintains continuous estimates of the IIP3 and the IIP2 and continuouslyupdates the estimates by the phase and amplitude corrections sent fromthe correlation process. The corrections are determined by the zeroforcing (or functionally equivalent such as, for example, a dither)units 430 and 434, which forces the cross correlation between thesignal-of-interest and the estimate of the intermodulation products tobe substantially kept at a minimum.

In one embodiment, the 20 Mega samples per second at 6 bits per sampleoutput of the cancellation units are input to the de-interleaver 436where the samples are low pass filtered to baseband signals and the bitstream is word de-interleaved to produce the in-phase and quadraturewords at 6 bits and 10 Mega samples per second. (Note that the clockfrequencies may vary in different embodiments for different targetsignals.) The word de-interleaving process produces a complex basebandsignal with perfect quadrature. In one embodiment of this invention, the20 mega samples per second are taken after the interference cancellationunit 428 and consecutive sets of four samples are taken. The first andsecond are the I and Q samples and the 3^(rd) and 4^(th) are dropped inthat they are just copies of the 1^(st) and 2^(nd) only 180 degreesshifted in time. The samples 1^(st) and 3^(rd) can be averaged toimprove SNR by 3 db. The same is true for the 2^(nd) and 4^(th) samples.The samples are now at approximately 5 mega samples per second and it isdesired to have them at 10 mega samples per second. The samples areinterpolated and up sampled at Ms/s the desired sample rate. In anotherembodiment of the invention, the sample rate out of the decimatingfilter is 40 mega samples per second and the rate of 10 mega samples persecond is achieved with the 4 sample de-interleaving described above.These clock rates may vary in different embodiments as function of thesignals being processed.

The phase de-rotation is performed in baseband processor 160. Since thephase de-rotation is done in baseband processor 160, phasing of the wordde-interleaver 436 is not critical because the information is fullycontained in the baseband complex signal. That is, what is not in thein-phase signal is in the quadrature signal, and what is not in thequadrature is in the in-phase signal. If a coherent de-rotated signal isrequired, the coherent detection may be performed using standard phaselock techniques.

The architecture also includes a transmit path that provides for anon-linear processing of the transmitter signals. In one embodiment, thetransmit path receives the 10 bit in-phase signal and quadrature samplesat 10 Mega Samples per second. The signals are sent to non-linearpre-distortion (NLPD) unit 438 and snap shot sampler 440. The I and Qsamples are input to pre-distortion unit 438, which performspre-distortion with the opposite amplitude modulation/amplitudemodulation (AM/AM) and amplitude modulation/pulse modulation (AM/PM)distortions induced by the non-linear elements in the transmit chain.Snap shot sampler 440 captures samples of the I and Q signals prior topre-distortion. These represent an ideal signal at the output of thehigh power amplifier (HPA) 442. These signals are compared to thetransmitted signal and the result is used to update parameters 444 whichstores the amplitude modulation/amplitude modulation and amplitudemodulation/pulse modulation pre-distortion parameters. In oneembodiment, the transmitter feed thru signal from the function 412 isused as the post non-linearity sample which is compared to thenon-pre-distorted sample of the transmit signal. In another embodiment,the transmitter has its own down conversion and sampling function to getthe post non-linearity signal sample for comparison.

The I and Q signals are orthogonal and the vector sum of the tworepresents the power of the composite signal. The amplitudemodulation/amplitude modulation and amplitude modulation/pulsemodulation distortions can be inverted and the pre-distorted I and Qsignals are corrected by non-linear pre-distortion unit 438 bynon-linear distortions of the transmit chain to produce a pristinenon-distorted signal at the output of the HPA 442. The initial values ofthe amplitude modulation/amplitude modulation and amplitudemodulation/pulse modulation distortions can be pre-determined atmanufacture or can be determined by the built in process describedherein. Receiver 400 processes a copy of the transmit signal as part ofthe intermodulation compensation scheme 416 and this signal is availablefor calibration of the amplitude modulation/amplitude modulation andamplitude modulation/pulse modulation parameters. All values of theamplitude modulation/amplitude modulation and amplitude modulation/pulsemodulation parameters for all transmit power levels do not need to bestored. A simple 3 or 5^(th) order fit to the amplitudemodulation/amplitude modulation and amplitude modulation/pulsemodulation curves will provide the required fidelity. The amplitudemodulation/amplitude modulation and amplitude modulation/pulsemodulation corrections can be made via a look up table implementation orsome other mechanism.

In one embodiment, after the I and Q samples have been pre-distorted tocompensate for the non-linearities in the transmit chain, the I and Qsamples are processed and interleaved by unit 438 to produce thecomposite digital transmit signal at 10 bits per sample at 20 Megasamples per second.

As part of the receiver intermodulation cancellation unit 412, a copy ofthe transmit signal is demodulated. A 6 bit 20 Mega sample per secondcopy of the transmit signal is available from receiver 400. A snap shotsample of the non-pre-distorted I and Q samples are available from snapshot sampler 440. The snap shot I and Q samples are word interleaved toproduce a composite signal. In the amplitude modulation/amplitudemodulation and amplitude modulation/pulse modulation correctioncalibration process 444, the interleaved snap shot samples arecorrelated with the receiver 400 provided copy of the transmit signaland these two signals are word (bit wise) shifted to achieve an optimumcorrelation. Any difference in the amplitude of the time-aligned samplesindicates the need to update the pre-distortion parameters. Theamplitude modulation/amplitude modulation and amplitude modulation/pulsemodulation correction parameters may be continuously updated. Thisupdate process 444 need not be a real time process, but faster than theanticipated changes in the non-linear components, which are a functionof time and temperature.

After the digital baseband signals have been pre-distorted 438 tocompensate for the transmitter non-linearities an up-sampling and deltamodulation process is performed by unit 446 where up sampling values aredetermined by linear interpolation between the 20 mega sample per secondsamples. This process produces a 1 bit per sample bit stream at a samplerate of approximately 100 to 200 MHz.

Thereafter, this bit stream is filtered by an image reject digitalfilter 448 then put through a one bit A/D converter (ADC) 450. In oneembodiment, when the 1 bit A/D converter 450 processes the 100 to 200MHz bit stream, images of the analog signal will be produced at everyharmonic of the sampling rate. An image rejected analog filter 452 isplace at the desired IF and the image reject filter 452 rejects theseimages. Since the sampling rate is rather high, the images will bespaced by multiples of the sampling rate. This should allow for an onchip image reject filter of only a few poles.

The signals are then up converted to RF using a local oscillator 454,mixer 456 and an image reject filter 458. Assuming an IF on the order of200 to 600 MHz (TBR), mixer 456 and potentially the local oscillator 454and image reject filter 458 can be on chip components.

HPA 442 is a large source of non-linear distortion in the transmitchain. Since this is not a classical direct conversion architecture, theresidual carrier problem is not a critical concern since there is nocarrier signal at the radio-frequency transmit frequency or any harmonicof it.

With the non-linear pre-distortion, HPA 442 can be operated much closerto saturation without clipping the signal and causing the re-growth ofside lobes. In one embodiment, a root raised cosine (RRC) type filter inthe baseband processor controls the transmit spectrum, allowing theovershoot between symbols can be on the order of 3 to 4 dB depending onthe alpha selected. Alpha determines the excess bandwidth over that of aperfect Nyquist brick wall filter. In an embodiment, the raised cosinefilters introduce controlled Inter-symbol Interference (ISI) whichcontrols the spectrum, but also makes the signal non-constant envelopeven if it stared out as a constant envelop signal such as QPSK or 8PSK.The inter-symbol interference of a raised cosine filter is zero at thecenter of each adjacent symbol period, but can cause signal over shootsof 3 to 4 dB depending on the alpha selected. The smaller the alpha, themore narrow the bandwidth and the greater the over shoot. This overshoot determines how close to saturation the amplifier may be operatedwithout causing clipping of the signal and re-growth of side lobes inthe transmit spectrum.

In an alternate embodiment of the receiver, the passband of the front ofthe system is much wider than the desired signal and the potentialsource signals come from a much wider passband. The second digitalfilter, which rejects the desired signal and passes the source signal,must cover up to 60 to 120 or more MHz. To avoid aliasing images inband, the sampling rate of the A/D converter should be at least 2.5times the Nyquist rate. In one embodiment, the Sigma Delta 1 bitsampling rate is 300 to 350 MHz, with the same sampling rate being usedfor the desired signal bandwidth. The front end SAW filter asradio-frequency is 140 MHz wide to allow passage of all of the potentialintermodulation source signals to include feed of the transmitterthrough the diplexer. The LNA receives this feed through. While thetransmitter feed thru is not within the receiver passband, it can mixwith other signals half way between the receiver and transmit bands andproduce intermodulation products in the receive passband. For thisreason, this signal is passed into the sampler to be included in theinterference set of source signals.

In one embodiment, at the intermediate frequency, the passband onlyneeds to be 80 MHz since the transmit and receive bands are paired andare 80 MHz apart. The intermediate frequency conversion local oscillator(local oscillator) is adjusted to center the down-converted signal onthe selected intermediate frequency. The passband filter can be 80 MHz.The selected Sigma Delta 1 bit A/D sampling rate has been selected tocapture the entire 80 MHz without producing aliasing of images. Theimage reject filter may be able to be an on chip filter with only a fewpoles due to the wideband of the sampling.

Two copies of the 1 bit A/D Sigma Delta bit steam are created and one isfiltered with a passband for the signal of interest. In one embodiment,the filter skirts are made very steep and the close-in interferingsignals are filtered out at this point, reducing the dynamic range thatmust be carried through the system and reduces the required resolutionin the desired pass band from 14 bits to approximately 6 or 7. With thisembodiment, the in-phase & quadrature channel orthogonality isguaranteed because the 20 mega samples are 6 or 7-bit wordde-interleaved to get the in-phase and quadrature samples. This is doneafter the intermodulation products cancellation, which is done on thein-phase-quadrature composite signal instead of being done on in-phaseand quadrature separately.

In one embodiment, the second copy of the Sigma Delta 1 bit A/D bitsteam is input to a band reject digital filter at the passband ofinterest. The down-sampling is done such that the retained passband is80 to 90 MHz with 3 to 6 bits of resolution per sample. This is adequatebecause only the very large signals are of interest and cancellationwith a resolution of 3 to 6 bits is an enormous benefit.

As in the general case, the high level out-of-band signals are used tocompute estimates of the in-band intermodulation products and are thenused to cancel the interference.

This compensation architecture is applicable to many othercommunications systems and this example is not intended to precludeother applications such as Edge, 802.11, Bluetooth, satellite systemsand others in this patent. In the CDMA telephony applications, thebaseband processor sends 8 or 10 bit words at approximately 10 megasamples per second to the transmitter module. In this architecture, thetransmitter has determined the amplitude modulation/amplitude modulationand amplitude modulation/pulse modulation distortion characteristics ofthe High Power Amplifier (HPA). The nonlinear pre-distortionpre-distorts the in-phase and quadrature vectors such that when theamplifier induces amplitude modulation/amplitude modulation andamplitude modulation/pulse modulation distortions, the result is acorrected signal at the output of the amplifiers. The pre-distortionmodule adjusts the amount of amplitude modulation/amplitude modulationand amplitude modulation/pulse modulation pre-distortion based on thedrive level of the amplifier.

After the pre-distortion is completed, the words are up-sampled by afactor of 10 to a 100:1 by interpolation between the original values.The samples are delta modulated and band passed and then input to a 1bit D/A converter. The analog signal is now up converted to the transmitfrequency. This provides a system with little or no residual carrier atradio-frequency.

FIG. 6 illustrates a flow diagram of one an embodiment of processingperformed by a receiver to reduce harmonic interference andintermodulation interference from a signal of interest prior to thefinal digital down conversion of that signal. This flow diagram isapplicable to the source signal intermodulation products as well as thetransmitter feed thru related intermodulation products.

Referring to FIG. 6, in processing block 600, a Sigma Delta A/Dconverter 602 outputs two copies of a source signal as digital samplesat a sampling rate greater than the sampling rate of the final digitaldown conversion.

In processing block 605, each copy of the signal is sent to a separateFIR filter in an intermodulation compensator. Note in alternativeembodiments, there may be any number of copies of the signal processedto manage multiple intermodulation products. Each FIR filter filters itsoutput signal at the Sigma Delta A/D converter sampling rate to reducethe interference from aliasing tails.

In processing block 610, one FIR filter operates as a band pass filterto pass the signal of interest at an intermediate frequency and producesthe signal-of-interest with in-band interference (processing block 615).

In processing block 620, another FIR filter operates as a band rejectfilter for the signal of interest and produces out of band signals thatare the source of the in-band interference intermodulation products.

In processing block 630, an intermodulation compensator computes theexpected in-band interference signals based on the IIP2, IIP3 and othernon-linear attributes of the system.

In another embodiment, with respect to processing block 620, two filtersare used to band pass the source signals and these are then used inprocessing block 630 to compute the intermodulation products estimate.

In processing block 635, the intermodulation compensator applies a bandpass filter to the signal estimates of the in-band interference toproduce an estimate of the in-band interfering signals (by passing aninterfering signal having the same frequency band pass as the desiredsignal).

In processing block 640, the intermodulation compensator inverts theestimate of the interfering signal set (processing block 640) and addsthe inverted interfering signal set to the original desired signal tocancel the interfering signals (processing block 645).

Also, in processing block 650, the intermodulation compensator crosscorrelates the inverted estimate of the interfering signal added to thedesired signal with a zero forcing (or other adaptive) algorithm untilthe cross correlation is reduced, and potentially reaches a minimum.Also in processing block 650 determines the phase and amplitude offsetsand passes them to processing block 655.

In processing block 655, the intermodulation compensator adjusts thephase and/or amplitude of the estimated interference signals with a zeroforcing (or other adaptive) algorithm and generates a signal to controlgeneration of the invert cancellation signal. The control loop may runcontinuously to adaptively cancel the in-band interfering signals.

This system may be applicable to any communications system includingthose with close in-interfering signals and in-band intermodulationproducts. The technique described above may be implemented as a set ofinstructions to be executed and stored in the memory of a computersystem (e.g., set top box, video recorders, etc.).

Alternatively, the logic to perform the methods as discussed above,could be implemented by additional computer and/or machine readablemedia, such as discrete hardware components as large-scale integratedcircuits (LSI's), application-specific integrated circuits (ASIC's),firmware such as electrically erasable programmable read-only memory(EEPROM's); and electrical, optical, acoustical and other forms ofpropagated signals (e.g., carrier waves, infrared signals, digitalsignals, etc.); etc.

Although the present invention has been described with reference tospecific exemplary embodiments, it will be evident that variousmodifications and changes may be made to these embodiments withoutdeparting from the broader spirit and scope of the invention.Accordingly, the specification and drawings are to be regarded in anillustrative rather than a restrictive sense.

FIG. 7 is a block diagram of another embodiment of the receiver which isa variation on the embodiment shown in FIG. 5. Referring to FIG. 7, thearchitecture is capable of processing several different modes orstandards in the North American telephony bands to include future growthto the 3G standard. This is done while maintaining backwardcompatibility between 3G and the other standards. This embodiment makesa single chip viable for all of the following in the two North AmericanTelephony Bands: CDMA IS-95/98, CMDA 2000, 3G, TDMA, AMPS, GSM, GPRS,EDGE and others. In another embodiment, the telephony standards of othercountries can be supported by changing the RF to IF down conversioncomponents. In an alternative embodiment, a flash A/D converter may beused in place of the Sigma Delta Modulator and Decimating filters if thedynamic range required by CMDA and the high power jammers is notrequired. In either case, the entire passband of the receiver is sampledand programmable or fixed digital filters are used to isolate desiredsignals, and interfering signals in the CDMA, AMPS, TDMA GSM etc signalbands. The sigma delta approach affords greater resolution and dynamicrange.

In FIG. 7, filter block 702 has two filters instead of one, one for the1.25 MHz CDMA 2000 and a 5 MHz filter for the 3G. The decimating filtersoutput 6 bits at approximately 20 Mega Samples per second for CDMA 2000and 6 bits at approximately 80 Mega Samples per second for 3G. 3G is aCDMA signal that is 4 times the rate of CDMA 2000 and is 4 times thebandwidth.

The Sigma Delta A/D converter has a sufficiently high over samplingratio (OSR) to provide adequate SNR for both CDMA 2000 and 3G. The SigmaDelta A/D converter has an OSR of 140 for and achieves a SNR of about ofover 85 dB for a 2^(nd) or 3^(rd) order sigma delta loop. This can yieldup to 14 bits if required and this is true for the source signals aswell. The OSR for 3G Wideband CDMA (WCDMA) is 35 which will yield a SNRof better than 80 dB for the 3^(rd) order loop and better than 60 dB forthe 2^(nd) order loop. This will yield 10 to 13 bits. In one embodiment6 bits are used to keep computational complexity down. If more bits arerequired, this can be achieved in the decimating filters.

In FIG. 7, filter block 701, the decimating programmable filter that inthe receiver of FIG. 5 previously used for the source interferingsignals is used for TDMA or AMPS signals. The frequency of the AMPS andor TDMA can be any where in the receive band of the telephony channels.The frequency is known by the control and status function and is passedto the source signal search block 704 which passes the frequencyassignment to decimation filter block 701. The filters in decimationfilter block 701 are nominally 300 kHz wide. Filter block 701 outputsthe signal to the AMPS/TDMA/GSM down sample and filter block 703 thatcomprises digital filters to filter out the narrow AMPS or TDMA signalsnormally 10 or 30 kHz wide. These signal are very narrow band and thesigma delta A/D converter results in a very high SNR and the number ofbits output can be 10 to 14 bits if required. In one embodiment, the OSRprovides adequate SNR for 14 bits, but less may be used to eliminatecomplexity. The previous description of the non-linear transmitter arealso applicable here as shown in the FIG. 7.

In one embodiment, with respect to filter block 701, the output of thedecimating filter can be a GSM signal processed in the same manner asdescribed for the TDMA and AMPS. The GSM is 200 kHz wide and can befrequency hopped. This is readily handled by filter block 701 because ithas two programmable filters (nominally 300 kHz wide) for the two sourcesignals used to generate the intermodulation product estimate. When thereceiver is used in the GSM mode, the two source signal decimatingfilters are used to filter the GSM signal. While one filter is beingused, the other is being set to the next GSM hop frequency and isswitched in at the appropriate time and then the other is set for thenext frequency. The output of filter block 701 goes to filter anddownsample block 703 where the final down conversion and filtering areperformed for the GSM signal. Since the GSM waveform is the same forGSM, GPRS, EDGE and any other variations on GSM. The previousdescription of the non-linear transmitter are also applicable here asshown in the FIG. 7.

The embodiment shown in FIG. 7, a variation on FIG. 5 provides a fullyprogrammable receiver that can demodulate known wireless telephonystandards. A minor difference exists at the RF front end where all bands(Europe, Asia, Japan, China, Korea, North America etc.) are downconverted to one convenient IF and then they are all processed by thearchitecture described herein. The upper path is just an example for theNorth American cellular band.

FIG. 8 shows the topology of the multi-standard architecture for theNorth American Telephony bands. In other embodiments, various RF bandscan be processed. CMDA, AMPS, GSM, TDMA, and 3G/UMTS with forward andbackward compatibility are provided with this embodiment.

Note that the analog BNA, mixer and LO may be integrated on the sameintegrated circuit as the receiver.

FIG. 9 shows another embodiment of the receiver in which wireless LAN802.11b and Bluetooth are processing simultaneously while mitigating theinterference of Bluetooth on 802.11b. This embodiment also supports802.11a.

The embodiment shown in FIG. 9 is a reduced version of FIG. 7 and FIG. 5with a few changes to accommodate the 22 MHz wide 802.11b signals. Thex-ed out boxes show which boxes in FIG. 7 are not required for thisapplication, showing the multi-mode capability of architecture.

Thus, FIG. 9 becomes a functional subset of FIG. 7. The ISM band is 85MHz wide and it contains both the 802.11b and the Bluetooth signals. Theoperation of the functional block here are the same as discussed above.The 802.11b signal of interest (SOI) is processed in filter block 908 asdiscussed above only with a different bandpass filter in the decimatingfilter. The Bluetooth signal is a frequency hopped signal and is 1 MHzwide and is used directly (i.e. intermodulation products are notcomputed) to cancel out the Bluetooth interference in the 802.11bsignal. The Bluetooth signal is narrowband filtered in the decimatingfilter 909 and is sent to phase and amplitude correction unit 910 forinterference cancellation support and to Bluetooth downsample unit 913for final down conversion and processing by the Bluetooth basebandprocessor. When 802.11a is being processed, the cancellation path isdormant and 802.11a is processed via filter in filter unit 908. FIG. 9is a subset of FIG. 7 with a few minor modifications. This embodimentallows for the embodiment shown in FIG. 7 to include the WLAN and PANfor a single receiver that can process all of the telephony standards aswell as the WLAN and PAN (802.11a, b and Bluetooth). This is shown inFIG. 10.

In FIG. 9, the antenna 901 receives the RF signal for the band ofinterest. While not shown in the diagram, one or more antennas may bepresent for the two bands at 2.4 GHz (ISM band for 802.11b andBluetooth) and the 5 GHz for the 802.11a. In one embodiment, duplexer902 is not required since these standards are not full duplex. It wouldbe included for embodiments where in the systems are full duplex. Theoutput of antenna 901 or duplexer 902 is sent to LNA 903 and SAW filter904 and then to down converting mixer 916. The output of down convertingmixer 916 is then filtered by image reject filter 905 to reject unwantedmixing products from the down conversion process. Down conversion unit906 performs the equivalent functions as LNA, SAW filter 904, the VGA,903 thru down converting mixer 916 only for the 5 GHz band. The outputof down converter 906 is at the same IF as that for the other band andit is filtered by image reject filter 905 to eliminate unwanted mixingproducts.

The output of image reject filter 905 is amplified by an amplifier 920and forwarded to Sigma Delta Modulator 907. The output of Sigma DeltaModulator 907 is sent to filters 908 and 909, which are the decimatingfilters. If higher bit resolution is required, the sigma delta samplingcan be increased to a higher rate. In another embodiment, Sigma DeltaModulator 907 and decimating filters 908 and 909 may be replaced by ahigh speed flash A/D converter followed by programmable or fixed digitalfilters in filters 908 and 909 Either way, the entire receive band isdigitized and high resolution samples of the 802.11b and the Bluetoothsignals result (probably 4 to 6 bits). Other embodiments may havegreater resolution. The Bluetooth signal is frequency hopped and the twosource signal filters in filter 909 are alternately used and programmedfor the next frequency hop.

In FIG. 9, the 802.11b and the Bluetooth signals are derived from samedigital samples and this aids greatly in keeping the signals aligned forthe cancellation functions. The Bluetooth signal is 1 MHz wide and the802.11b is 22 MHz wide. If the signal in the 1 MHz passband of theBluetooth signal is cancelled out, the 802.11b signal suffers a 0.2 dBloss in signal strength. The Bluetooth signal, in 1 MHz, can have apower level comparable to that of the 802.11b in 22 MHz, which meanswithout the Bluetooth mitigation the 802.11b will see around a 0 to 5 dBSNR after dispreading. The Bluetooth cancellation will result in a 0.2dB reduction in the SNR of the 802.11b which is a very manageablereduction yielding an 802.11b SNR that is only 0.2 dB less than thatwhich would be seen in the absence of Bluetooth.

The output of 909 is sent to phase and amplitude correction unit 910 anddownsample unit 913. In downsample 913, the Bluetooth signal is downconverted and filtered for output to and processing in the Bluetoothbaseband processor 930. The signal sent to correction unit 910 iscorrected for phase and amplitude for the given hop frequency such thatthe correlation in 911 is reduce, and potentially minimized, asdiscussed above. This embodiment does not require any special interfacesand or coordination with the Bluetooth and 802.11b baseband processors,so this will work with any vendor's processor.

Correlation unit 911 receives a copy of the 802.11b signal after theBluetooth cancellation has taken place. Correlation unit 911 alsoreceives copy of the Bluetooth signal and computes the cross correlationof this signal and 90 degree shifted version and using a ditheralgorithm determines phase and amplitude adjustment to be made in phaseand amplitude correction unit 910 such that the residual Bluetoothsignal in the 802.11b is reduced, and potentially minimized. TheBluetooth signal used up to 79 frequencies in the ISM band and it isreasonable to assume that each frequency might require a different phaseand amplitude adjustment to optimize the cancellation of the Bluetoothsignal in the 802.11b signal. To accommodate this, phase and amplitude910 maintains a continuously updated table of the phase and amplitudeadjustments required to reduce the residual Bluetooth signal. Thesetable values are constantly updated by inputs from correlation unit 911.

In one embodiment, a SAW IF filter is used to increase the dynamic rangeof the receiver is the presence of high power blocking signals.

One embodiment of a receiver, with an IF filter to improve dynamicrange, is shown in FIG. 13. This receiver is 3G compatible. When thejammer signals are high amplitude relative to the signal of interest,the amplitude of the jammer (blocking signals) is reduced prior to thesigma delta converter if the sampling is to be done at an IF frequency.The maximum dynamic range could be limited to around 50 to 55 dB. Thereason for this is that it is difficult to get a SNR greater than 50 or55 dB at IF. When the signal of interest is as low as −116 dm and theblocking tone is at −30 dBm, the A/D conversion process requires a SNRof around 86 to 90 dB to be able to filter out the blocking signal andretain the signal of interest. When this is the case, an IF filter (inone embodiment a SAW filter) can reduce the blocking signal by 35 to 40dB. At this point, the sigma delta can be used to sample the filteredsignal and get the 50 to 55 dB or about 9 bits.

Referring to FIG. 13, the source signals are no longer available in thedigital sample from the sigma delta and is derived from another source.

Antenna 1101 receives a signal that is sent to duplexers 1102 thatseparates the received signal into two bands, band 0 and band 1. Eachband is sent to a separate LNA, LNA 1103 or LNA 1104. In one embodiment,LNAs 1103 and 1104 amplify their respective signals to a range of1050-1990 MHz. The amplified signals are then filtered with RF SAWfilters 1105 and 1106. In one embodiment, RF SAW filter 1105 has apassband of 50 MHz, while RF SAW filter 1106 has a passband of 60 MHz.The filtered signals output from RF SAW filters 1105 and 1106 areamplified by VGAs 1107 and 1108, respectively. The amplified signalsoutput from VGAs 1107 and 1108 are mixed with a local oscillator usingmixers 1109 and 1110 to bring the signals to an IF. In one embodiment,the output of mixers 1109 and 1110 are at a 400 MHz IF.

The outputs of mixers 1109 and 1110 are output to IF SAW filter 1111,the output of which is amplified by amplifier 1112. The output ofamplifier 1112 is sent to Sigma Delta A/D 1113. In one embodiment, SigmaDelta A/D comprises a 200 MHz 1-bit A/D.

The output of Sigma Delta A/D 1113 is input to decimating filters 1114.Decimating filters 1114 operate as described above. In one embodiment,the output of decimating filters 1114 are 6 to 8 bits (for 3G) and 80Mega samples per second, while in an alternative embodiments, the outputis 20 Mega samples and 6 to 8 bits for others. The output of decimatingfilters 1114 is sent to summation block (cancellation block) 1122 tocancel the in-bound interference as described above. The output ofsummation block 1122 is output to filter 1125, which low pass filtersthe signals to baseband and output I and Q channels to a basebandprocessor.

More specifically, in FIG. 11, the analog signal is split after the downconverting mixer 1110 and sent to IF filter 1111 and to flash A/Dconverter 1116 (e.g., a 4 bit 200 MS/s flash A/D converter). In oneembodiment, bandpass filter 1115 may be included (but is not necessary).In one embodiment, bandpass filter 1115 has a 60 MHz passband. Flash A/Dconverter 1116 over samples the entire receive passband at 3 or 4 bitsat a rate higher than the Nyquist rate to avoid aliasing. The output offlash A/D converter 1116 is sent to two cells 1117 and 1118.

In one embodiment, intermods source signal identification block 1117breaks the receive pass band into frequency blocks and computes the DFT(or the FFT) to identify the blocks in which there is sufficiently highenough energy to create intermods. This function also determines whichsource signals are at the required frequency spacing to create intermodswhich will produce intermods in the pass band of the signal of interest.Only those that can produce intermods in the passband of the signal ofinterests are identified for filtering.

In one embodiment, the first blocks are 3 MHz wide and those of interestare broken into 300 kHz blocks. Decimating filters 1114 that follow arenominally 300 to 400 kHz. Source signals are multiplied in the timedomain to produce an estimate of the inband intermods. The estimate isfiltered to the passband of the signal of interest to isolate thosesignals that need to be cancelled in the passband of the signal ofinterest.

In one embodiment, flash A/D converter 1116 receives the frequencies ofthe source signals and uses programmable decimating filters to isolatethe source signals and increase the SNR by narrow band filtering. Thesesignal sets are sent to intermod computation block 1119 where anestimate of the intermods is computed.

In one embodiment, Macro Delay Buffer 1120 provides for delays of up tosome number of samples to perform an approximate phase shift to accountfor any differences in the delay between the signal of interest path andthe intermod generate path. The micro delay is done at the sub-samplelevel in phase and amplitude adjustment block 1121.

In one embodiment, a calibration pulse is generated when the receiver ispowered up to set the macro delay and then a phase adjustment iscontrolled by the correlators 1123. In one embodiment, correlators 1123use a minimization algorithm in a manner well-known in the art. Afterthis point, the processing is in the receiver embodiments describedabove without the IF filters.

1. A method comprising: subjecting a wideband low amplitude signal tointerference from a high amplitude narrow band signal; and isolating thenarrow band signal by digital filters and using the isolated narrow bandto cancel the interference in the low amplitude wideband signal.
 2. Themethod of claim 1 wherein the narrow band signal is a frequency hoppedsignal and the phase and amplitude of each hopped frequency are storedand used when said each hopped frequency is used.
 3. The method of claim2 further comprising adjusting the phase and amplitude of the narrowbandsignal to cause the interference to be reduced and storing the valuesfor each frequency hop for use when said each frequency hop is used. 4.The method of claim 2 a transmitter baseband processor providing thesequence of frequency hops, and a receiver using programmable digitaldecimating filters to isolate the wideband low amplitude signal and thenarrow band high amplitude frequency hopped signals from the same oversampled bit stream of the receive band.
 5. The method of claim 4 furthercomprising using the isolated narrowband signal to process one serviceand using the signal to cancel the interference of the narrowband signalin the wideband signal.
 6. The method of claim 1 further comprisingprocessing 802.11b/g and Bluetooth simultaneously and canceling theinterference of the Bluetooth signal on the 802.11b/g.
 7. An apparatuscomprising: means for subjecting a wideband low amplitude signal tointerference from a high amplitude narrow band signal; and means forisolating the narrow band signal by digital filters and using theisolated narrow band to cancel the interference in the low amplitudewideband signal.